Design Support

Technical Notes

File Title and Description sort ID Number sort Last Update sort Software Downloads
pdf Calculating Memory System Power for RLDRAM II - Details how RLDRAM II devices consume power and provides tools to estimate power consumption. TN-49-04 Nov 2007
pdf RLDRAM II Clocking Strategies - Addresses the operation of the RLDRAM II device outside the specified range of clock periods and the timing changes that occur in this mode of operation. TN-49-03 May 2007
pdf Exploring the RLDRAM II Feature Set - Outlines the performance-enhancing features offered by RLDRAM II architecture TN-49-02 Jan 2006
pdf RLDRAM II Design Guide - Describes the general features of circuit implementations using RLDRAM memory architecture TN-49-01 Jun 2008
pdf Product Replacement for x32 EOL SDRAMs - Outlines recommendations for replacing or transitioning away from high density, x32 components that are nearing end of production. TN-48-16 Jul 2006
pdf Backward Compatibility for Faster SDRAM - Reviews the timing differences between SDRAM generations and shows how the faster Micron parts are compatible with the slower parts TN-48-15 Oct 2005
pdf Interfacing SDRAM Devices with Motorola's MPC8xx TN-48-12 Feb 2002
pdf Power Saving Features TN-48-10 Jun 2002
pdf LVTTL Derating for SDRAM Slew Rate Violations TN-48-09 Oct 2000
pdf Designing in SDRAM for Future Upgrades TN-48-08 Mar 2004
pdf Increasing Battery Life in Laptops TN-48-06 Feb 2000
pdf SDRAM WRITE to ACTIVE Command Timing TN-48-05 Nov 2000
pdf Is Your Module PC100? - Explains how to determine if a module using Micron SDRAMs is PC100-compliant. The speed designator on the SDRAM component does not necessarily reflect the system application speed of the module. TN-48-04 Feb 1999
pdf Designing for High Performance With Synchronous DRAM Modules TN-48-03 Feb 1999
pdf Examples of READ-MODIFY-WRITE Cycles With Synchronous DRAMs TN-48-01 Feb 1999
pdf Advantages of DDR2 Differential DQS Signaling - Focuses on the benefits the differential DQS signaling feature provides and explains how to design with it TN-47-23 Mar 2008
pdf Designing for 1.5V, Low-Power FBDIMMs - Discusses memory power trends and identifies new low-voltage solutions for high-density DDR2 memory designs TN-47-22 Feb 2008
pdf FBDIMM – Channel Utilization (Bandwidth and Power) - Newly introduced FBDIMMs offer virtually unlimited scalability of density, a significantly reduced number of routed motherboard signals, and high bandwidth solutions, all with an extremely reliable channel protocol. TN-47-21 Oct 2006
pdf DDR2 (Point-to-Point) Package Sizes and Layout Basics - General guidelines for developing the PCB floor plan. TN-47-20 May 2006
pdf DDR2 (Point-to-Point) Features and Functionality - Focuses on the unique memory requirements of point-to-point design layouts and describes DDR2 features and functionality. TN-47-19 Apr 2006
pdf DDR2 SODIMM Optimized Address/Command Nets - Provides the system-level designer with an overview of the DDR2 SODIMM family and offers insight into termination techniques utilized on the commands and addresses for these modules TN-47-17 May 2005
pdf Designing for High-Density DDR2 Memory - Focuses on designing for high-density memory—addressing schemes of each density, configurations, and the subtle differences between the 4-bank and new 8-bank DDR2 devices TN-47-16 May 2005
pdf DDR2 tCKE Power-Down Requirement - Describes the tCKE timing parameter of DDR2 SDRAM TN-47-14 Dec 2004
pdf DDR2 Read Interrupt - Describes legal execution of a READ interrupted by a READ command TN-47-13 Dec 2004
pdf DDR2 Redundant Data Strobe (RDQS) - Describes how to enable the redundant data strobe (RDQS) TN-47-12 Dec 2004
pdf DDR2 Differential DQS Feature - Describes the differential DQS function of the DDR2 SDRAM TN-47-11 Dec 2004
pdf DDR2 Posted CAS# Additive Latency (both) - Describes the AL function of the DDR2 SDRAM device TN-47-10 Dec 2004
pdf DDR2 SDRAM Bank Addressing - Describes the evolution in array architecture from DDR to DDR2 SDRAM TN-47-09 Dec 2004
pdf DDR2 Package Sizes and Layout Requirements - Covers DDR2 package sizes and layout requirements TN-47-08 Nov 2005
pdf DDR2 Simulation Support - Covers DDR2 simulation, adding to Micron's extensive array of design support tools for system designers TN-47-07 Aug 2004
pdf Updated JEDEC DDR2 Specifications (mods too) - Covers the updated JEDEC specifications for systems using the initial DDR2-400 and DDR2-533 parts TN-47-06 Aug 2004
pdf Power Solutions for DDR2 Notebook PCs - Provides a general guideline for designing the DDR2 memory power circuitry TN-47-05 Jun 2004
pdf Calculating Memory System Power for DDR2 - Details how DDR2 SDRAM consumes power and provides tools to estimate power consumption in a given system. TN-47-04 Jun 2006
pdf Module Pinout Decoder - Provides sorted pin assignment tables and pin location figures for use in DDR2 DIMM signal identification, tracing, and troubleshooting TN-47-03 Aug 2004
pdf DDR2 SDRAM Offers New Features and Functionality - Discusses the various changes in DDR2 technology and the resulting features and benefits TN-47-02 Jun 2006
pdf Design Guide for Two-DIMM, Unbuffered Systems - DDR2-533 memory design guide for two-DIMM, unbuffered systems TN-47-01 Oct 2004
pdf LPSDRAM Unterminated Point-to-Point System Design: Layout and Routing Tips - Provides guidance for the development of multilayer board designs. TN-46-19 Nov 2008
pdf Interface Design Guide for STMicroelectronics Cartesio Microprocessor - Guidelines for interconnecting the STA2062 dynamic bus controller to two Micron 512Mb Mobile DDR SDRAM devices. TN-46-18 Aug 2008
pdf 512Mb Mobile DDR: 95nm to 78nm Product Transition Guide - Discusses transition from 95nm to 78nm product technology TN-46-16 Sep 2007
pdf Low-Power Versus Standard DDR SDRAM - An overview of the functional and mechanical differences between low-power and standard DDR and a description of exclusive features of low-power DDR. TN-46-15 Jan 2007
pdf Hardware Tips for Point-to-Point System Design - Proven techniques for termination, layout, and routing. TN-46-14 Jun 2008
pdf Backward Compatibility for Faster DDR SDRAM - Reviews DDR SDRAM device speed timing differences and shows the compatibility of Micron’s faster speed grade parts with its slower ones TN-46-13 Aug 2005
pdf Power saving features - Addresses the power-saving features and power calculations of low-power Mobile DRAM memory TN-46-12 Oct 2005
pdf DDR SDRAM Point-to-Point Simulation Process - Covers rarely addressed areas of the DDR SDRAM point-to-point simulation process TN-46-11 Jul 2005
pdf Designing for 1Gb DDR SDRAM TN-46-09 Dec 2003
pdf Initialization Sequence for DDR SDRAM TN-46-08 Oct 2005
pdf DDR333 Design Guide for Two-DIMM Unbuffered Systems TN-46-07 Dec 2002
pdf Termination for Point-to-Point Systems TN-46-06 Sep 2001
pdf General DDR SDRAM Functionality TN-46-05 Jul 2001
pdf Synchronous Timing for DDR SDRAM TN-46-04 May 2001
pdf Calculating DDR Memory System Power TN-46-03 Mar 2005
pdf Decoupling Capacitor Calculation for a DDR Memory Channel TN-46-02 Jul 2004
pdf High speed DRAM controller design - Identifies and discusses five key areas of DRAM controller design TN-45-54 Apr 2008
pdf Connecting Micron® CellularRAM® Devices with the Atmel® Microcontroller - Describes the preferred methods for connecting Micron CellularRAM devices to the Amtel microcontroller TN-45-33 Jul 2008
pdf PSRAM 101: An Introduction to Micron CellularRAM and PSRAM - Demonstrates PSRAM and CellularRAM memory advantages over other memory options for use in mobile handsets; and presents available configurations TN-45-30 Jun 2008
pdf Using Micron® Asynchronous PSRAM with the NXP LPC2292 and LPC2294 Microcontrollers - Describes the design requirements for a seamless memory connection between the NXP LPC2292 and LPC2294 family of microcontrollers and a Micron asynchronous PSRAM device. TN-45-29 Jun 2007
pdf Using a Micron CellularRAM® Device with the AMCC PPC405EZ Embedded Processor - Describes the design requirements for a seamless memory connection between the PPC405EZ and a Micron CellularRAM device. TN-45-28 Jun 2007
pdf Using Micron Asynchronous PSRAM with ADI ADSP-BF53x Blackfin® Processors - Describes the design requirements for a seamless memory connection between Analog Device’s Blackfin® processors and Micron® 70ns, 8Mb asynchronous PSRAM devices. TN-45-27 Jun 2007
pdf WAIT Alignment for Micron CellularRAM Devices - Describes the implementation of WAIT functionality for asynchronous and burst operations TN-45-25 Feb 2007
pdf Fixed-Latency Operation in CellularRAM 1.0 Devices - Details how Micron has enhanced CellularRAM CR1.0 functionality TN-45-24 Aug 2006
pdf Using CellularRAM Memory on a NOR FLASH Bus - Discusses design considerations when placing a CellularRAM memory device on a NOR Flash bus TN-45-23 Aug 2006
pdf Variable vs. Fixed Latency CellularRAM™ Operation - This technical note assists designers in understanding the differences between CellularRAM variable and fixed latency operations. TN-45-22 Aug 2006
pdf Low-Power Options for Async/Page CellularRAM - Discusses the low-power options available to customers on async/page CellularRAM memory devices TN-45-20 May 2006
pdf Using CellularRAM® Memory to Replace NEC Mobile Specified RAM (µPD46128512) - Discusses migrating a 128Mb NEC Mobile Specified RAM design (µPD46128512) to Micron 128Mb CellularRAM memory (MT45W8MW16B). Both hardware and software changes are covered. TN-45-18 Mar 2006
pdf Using CellularRAM® Memory to Replace Single- and Dual-Chip Select SRAM - Discusses migrating a single- or dual-chip select SRAM design to Micron® CellularRAM® memory. Both hardware and software changes are covered. TN-45-17 Jan 2007
pdf Using CellularRAM Memory to Replace Fujitsu 1.8V FCRAM - Discusses replacing Fujitsu 1.8V FCRAM with Micron CellularRAM memory TN-45-16 Mar 2006
pdf Row Boundary Crossing Functionality in CellularRAM™ Memory - Explains row boundary crossing in Micron CellularRAM memory devices TN-45-15 Sep 2007
pdf Using CellularRAM Memory to Replace Fujitsu 3V FCRAM - Discusses replacing Fujitsu 3V FCRAM with Micron CellularRAM memory TN-45-14 Mar 2006
pdf Using CellularRAM Memory to Replace UtRAM - Assists migration from a 128Mb UtRAM design (K1B2816B6M) to Micron 128Mb CellularRAM memory (MT45W8MW16B). Both hardware and software changes are covered. TN-45-13 Feb 2006
pdf Designing Applications with the x16 Burst A/D Multiplexed Interface - Discusses the differences between a burst non-A/D MUX and burst A/D MUX device TN-45-10 Jan 2005
pdf 64Mb Burst CellularRAM P25A to P25Z Transition Guide - Discusses migrating a design based on the async/page/burst MT45W4MW16B (P25A) to MT45W4MW16BC (P25Z) TN-45-09 Jan 2005
pdf 64Mb Async/Page CellularRAM P25A to P25Z Transition Guide - Discusses migrating a design based on the async/page MT45W4MW16P (P25A) to the MT45W4MW16PC (P25Z) TN-45-08 Jan 2005
pdf Implementing CellularRAM® 2.0 x32 with Two CellularRAM 1.5 x16 Devices - Documents how the x32 CR2.0 memory interface can be emulated using a two-die stack of x16 CR 1.5 devices. TN-45-07 Mar 2007
pdf Density Migration for x16 Burst Multiplexed PSRAM Introduction - Discusses the design differences to account for when migrating a burst multiplexed device from 16Mb to 64Mb TN-45-06 Jan 2006
pdf CellularRAM Multiplexed Async/Burst Operation - Discusses multiplexing a non-multiplexed CellularRAM device at the substrate level TN-45-04 Mar 2005
pdf CellularRAM Asynchronous and Mixed-Mode Slow-Clock WRITE Concerns - Discusses the use of Micron CellularRAM-based devices in Mixed Mode operation and slow clock speeds TN-45-02 Sep 2005
pdf Functional Differences Between CellularRAM 1.0 and CellularRAM 1.5 - Discusses the functional difference between the CellularRAM 1.0 and CellularRAM 1.5 memory devices TN-45-01 Aug 2005
pdf DDR3 Power-Up, Initialization, and Reset - Describes power-up, initialization, and the RESET# pin in DDR3 TN-41-07 Nov 2008
pdf DDR3 Termination Data Strobe - Provides guidelines for using the TDQS feature to reduce signal integrity issues associated with mismatched DQS loading in in combined x4-based/x8-based systems TN-41-06 Mar 2008
pdf DDR3 Dynamic On-Die Termination - With DDR3, dynamic ODT provides systems with increased flexibility to optimize termination values for different loading conditions. TN-41-04 Mar 2008
pdf DDR3 ZQ Calibration - Describes how the DDR3 SDRAM driver design has been enhanced TN-41-02 Feb 2008
pdf Calculating Memory System Power For DDR3 - Details how DDR3 SDRAM consumes power and provides the tools that system designers can use to estimate power consumption. TN-41-01 Aug 2007
pdf Wear-Leveling Techniques in NAND Flash Devices - Highlights the importance of wear leveling, explains two wear-leveling techniques, and discusses implementing wear leveling TN-29-42 Oct 2008
pdf Using COPYBACK Operations to Maintain Data Integrity in NAND Flash Devices - Describes how to use COPYBACK operations in NAND Flash devices TN-29-41 Oct 2008
pdf Memory Management in NAND Flash Arrays - Describes common NAND Flash memory-management methods for effective use of the NAND Flash memory array. TN-29-28 Jul 2007
pdf NAND Flash Status Register Response in Cache Programming Operations - Describes status register responses when operating in cache programming modes. TN-29-26 Jun 2007
pdf Improving NAND Flash Performance Using Two-Plane Command Enabled Micron Devices - Describes the performance benefits of Micron two-plane commands, and provides implementation guidelines for making the best use of two-plane capabilities. TN-29-25 Sep 2008
pdf Micron Wire-Bonding Techniques TN-29-24 Jun 2007
pdf NAND Flash 101 - An Introduction to NAND Flash and How to Design It In to Your Next Product TN-29-19 Nov 2006
pdf Booting from Embedded MMC - Describes booting from an embedded ARM processor in the MMC environment. TN-29-18 Jun 2008
pdf NAND Flash Design and Use Considerations - Describes design and use considerations for NAND Flash memory, focusing on bad-block identification and error correction. TN-29-17 Aug 2006
pdf Boot-from-NAND Using Micron MT28F1G08ABA NAND Flash with the Texas Instruments™ OMAP™ 2420 Processor TN-29-16 Jun 2007
pdf NAND Flash Performance Improvement Using Internal Data Move - NAND data management capabilities and higher system performance through NAND Flash internal data moves TN-29-15 Jun 2007
pdf NAND Flash Performance Increase with PROGRAM PAGE CACHE MODE Command TN-29-14 Jun 2007
pdf Monitoring Ready/Busy Status in 2, 4, and 8Gb Micron NAND Flash Devices TN-29-13 Jun 2007
pdf NAND Flash Security TN-29-11 Jun 2007
pdf Freescale™ DragonBall™ MX1 Adaptation for NAND Flash Memory TN-29-10 Jun 2007 Download NAND Low Level Flash Drivers
pdf Hamming Codes for NAND Flash Memories TN-29-08 Jun 2007
pdf Small Block vs. Large Block NAND Devices TN-29-07 Jun 2007
pdf Micron NAND Flash Controller via Xilinx Spartan-3 FPGA TN-29-06 Apr 2005 Download VHDL Code
pdf Micron ECC Module for NAND Flash via Xilinx™ Spartan™-3 FPGA TN-29-05 Jun 2007 Download VHDL Code
pdf Using Micron MT29F2G08AACWP NAND Flash Memory in 2Gb Samsung K9F2G08U0A Applications TN-29-04 Jun 2007
pdf Using Micron MT29F2G08AACWP NAND Flash Memory in Toshiba TC58NVG1S3BTG00 Applications TN-29-03 Jun 2007
pdf NAND Flash Performance Increase - Using the Micron® PAGE READ CACHE MODE Command TN-29-01 Jun 2007
pdf Sourcing Micron Memory for Intel chipsets - Discusses two important functional differences between the 865 and 875 to consider when sourcing memory modules TN-04-52 Aug 2003
pdf Comparing Module Parameters TN-04-49 Jan 2003
pdf Choosing The Correct 168-Pin DIMM Socket - Assists designers in selecting the correct 168-pin DIMM socket for any application TN-04-47 Nov 1999
pdf Maximizing DRAM Valid Data-Out Window - Explains how to maximize the SDRAM valid data-out window TN-04-44 Feb 1999
pdf Memory Module Serial Presence-Detect - Describes how SDP is essential in helping to standardize the configuration, timing, and manufacturing information of memory modules TN-04-42 Oct 2008
pdf Various Methods of DRAM Refresh - Addresses frequently asked questions about DRAM refresh TN-04-30 Feb 1999
pdf SEMI wafer map format TN-00-21 Jul 2008
pdf Understanding Signal Integrity - Describes how memory design, test, and verification tools can be used to the greatest advantage, from conception of a new product through end of life TN-00-20 Jun 2005
pdf Thinning Considerations for Wafer Products - Information on optimal wafer-thinning processes to meet specific customer requirements TN-00-19 Nov 2004
pdf Uprating of Semiconductors for High-Temperature Applications - Describes the issues associated with temperature uprating and the risks involved in using components and/or systems outside the manufacturer’s environmental specifications TN-00-18 May 2008
pdf Timing Specification Derating for High Capacitance Output Loading - Describes how to create capacitance derating data for Micron products that can then be used in preliminary evaluations of system timing TN-00-17 May 2004
pdf Recommended Soldering Parameters TN-00-15 Mar 2007
pdf Understanding the Quality and Reliability Requirements for Bare Die Applications TN-00-14 Sep 2001
pdf Accelerate Design Cycles with SIM Models TN-00-09 Oct 2006
pdf Thermal Applications - Defines a general method and criteria for measuring and ensuring that Micron components and modules do not exceed the maximum allowable temperature. TN-00-08 May 2008
pdf IBIS Behavioral Models TN-00-07 Sep 1999
pdf Bypass Capacitor Selection for High-Speed Designs TN-00-06 Sep 1999
pdf Moisture Absorption in Plastic Packages - Describes the shipping procedures that ensure Micron’s customers receive memory devices that do not exhibit the popcorn effect TN-00-01 Mar 2007
pdf 184-pin DDR RDIMM JEDEC Design Standard - This specification defines the electrical and mechanical requirements for 184-pin, 2.5V, PC1600/PC2100, 64/72-bit wide, DDR SDRAM RDIMMs. JEDEC TN-03 May 2006
pdf SPD JEDEC Standards for UDIMMs, RDIMMs, and SODIMMs - This application note fully describes the Serial Presence Detect assignments for SPD used on DDR SDRAM Modules JEDEC TN-02 Nov 2001
pdf JEDEC 184-pin DDR RDIMM JEDEC Mechanical Dimensions JEDEC TN-01 Aug 1998